As the value and use of information continues to increase, individuals and businesses seek additional ways to process and store information. One option available to these users is an information handling system. An information handling system generally processes, compiles, stores, and/or communicates information or data for business, personal, or other purposes thereby allowing users to take advantage of the value of the information. Because technology and information handling needs and requirements vary between different users or applications, information handling systems may vary with respect to the type of information handled; the methods for handling the information; the methods for processing, storing or communicating the information; the amount of information processed, stored, or communicated; and the speed and efficiency with which the information is processed, stored, or communicated. The variations in information handling systems allow for information handling systems to be general or configured for a specific user or specific use such as financial transaction processing, airline reservations, enterprise data storage, or global communications. In addition, information handling systems may include or comprise a variety of hardware and software components that may be configured to process, store, and communicate information and may include one or more computer systems, data storage systems, and networking systems.
A computer system may include a field programmable gate array (FPGA). A field programmable gate array is an integrated circuit that includes logic or gates, the function of which can be programmed by the user. Because an FPGA may be programmed upon the power up of the computer system, it is desirable to be able to quickly program the FPGA. One method of programming a FPGA involves the generation of a serial data stream that is transmitted to the FPGA. One method of generating the serial data stream involves the toggling of a general purpose input output device (GPIO) that is coupled to the FPGA. In operation, the CPU of the computer system will write transmit a data signal (logical high or logical low) to the GPIO before each clock cycle of the GPIO. As part of its clock cycle, the GPIO will transmit the data to the FPGA. This process is time consuming, however, as it requires that the CPU to individually test each bit of the data stream, set to the GPIO to the required logic level, then issue a clock cycle of the GPIO, thereby increasing the time required to transmit programming data to the FPGA.